Waveform Measurement Challenges
Since the density of PCB layouts is increasing, the ideal probing point is often physically not accessible by a probe. A common case is at the termination of a signal path at the input to a receiver. In such a case, the signal must be picked up from a point before the terminator as shown in Figure 1. However, the point where the probe is placed may be affected by reflections from an imperfect termination of the signal path. One common cause of this is the input capacitance of the receiver chip.
Figure 2 shows an example of this kind of measurement. The signal is a 156 MHz clock which is being probed at a via close to the receiver chip. The waveform has a reflection of signal energy 257 ps from the edge. This is measured from the midpoint of the first rising edge of the incident pulse, (see P1, time@lvl measurement) to the midpoint of the falling edge of the reflected pulse (see P2), and is calculated in P3 as 257 ps.
Tools to Compensate for the Reflection
To compensate for the reflection a de-embed/simulation tool can be used. However, these tools, in general, need the S-parameters of the DUT. LeCroy’s VirtualProbe@Receiver (“VP@Rcvr”) math operator is provided as a component in the EyeDoctor II software package. This advanced signal integrity tool is easy for engineers to setup using the familiar termination model shown in Figure 3.
Notice that VP@Rcvr has two modes: Simulation (“Sim”) and termination (“Term”). Termination mode determines an output signal at the receiver by emulating a lumped component termination that sits between the actual probed point and the receiver. Simulation mode can be used to verify the termination model.
JitterSim for Transmitter Simulation
To configure the termination model and verify it, the JitterSim component of the SDA II Serial Data Analysis Package can be used. This is a convenient tool for simulation of a transmitter. In this example, JitterSim generates a 156.17 MHz clock signal with a 250ps rise time, 40% of duty cycle and 2V amplitude as shown in the lower traces in Figure 4. F1 (lower left) is the clock signal generated with the JitterSim function, and Z2 (lower right) is a zoom of F1. The upper trace (M1) and zoom (Z2) are the real signal originally captured at the probing point.
Verify the Termination Model
To verify the termination model for compensation, the simulation mode of VP@Rcvr can be used with an ideal transmitter signal that is generated by JitterSim. In this application, F2 is configured as the VP@Rcvr operator in “Sim” mode as shown in Figure 5.
The signal path is assumed to be a 50 ohm system, and Td is set to 130ps, which is about half of the delay of the 257 ps measured delay as shown in Figure 2. The F2 trace simulates the signal at the probing point (the via) using the termination model. If the F2 trace has reasonable agreement with the actual measured signal shape, the termination model is verified to be applicable for compensation in “Term” mode. In this example, with C=2.8 pF, the F2 trace has reasonable agreement with the M1 trace (upper two traces) as shown in Figure 6.
Compensate the Reflection
Now, the termination model can be applied for reflection compensation in “Term” mode of VP@Rcvr. Change the source of F2 from F1 to M1, which is the stored version of an actual measured signal, and change the mode from “Sim” to “Term”. F2 is now the emulated signal at the receiver’s termination as shown in Figure 7.
The F2 trace is now clean a clock signal without a reflection. Users can make a precise characterization of the signal at the receiver using this waveform, including eye and jitter measurements.
The VirtualProbe@Receiver math operation is a powerful tool for compensating for reflections caused by imperfect terminations at a receiver. With the math operation, users can probe at a point upstream of the receiver, and emulate the receiver termination by using a simple model. The operation is easy to use, and includes a simulation mode to aid in the determination of values to use for impedance, inductance capacitance and time delay.