Summit Z416 Protocol Exerciser

Teledyne LeCroy offers a broad spectrum of PCI Express protocol analyzer platforms (Summit M616, Summit T516, Summit T54, Summit M5x, Summit T416, Summit T48, Summit T3-16, Summit T3-8, Summit T34, Summit T28, and Summit T24). The Summit M616, T516, T54 and M5x are Teledyne LeCroy’s leading edge products supporting PCIe 6.0 and CXL specifications. The Summit T416, T48, T34, and T3-16 are Teledyne LeCroy's midrange protocol analyzers. These protocol analyzers are at the forefront of SSD and computer storage analysis, test and compliance. The Summit T28 and T24 are entry level protocol analysis tools for development and test at PCIe 2.0.

The Summit M616 Protocol Analyzer for PCIe 6.0 and CXL is the highest performance platform. It provides full bidirectional support of x16, x8, x4, x2, and x1 at data rates up to 64 GT/s. With 64GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express data streams.

The Summit T516 Protocol Analyzer for PCIe 5.0 and CXL is the highest performance platform. It provides full bidirectional support of x16, x8, x4, x2, and x1 at data rates up to 32 GT/s. With 256GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express data streams.

The Summit T54 Protocol Analyzer for PCIe 5.0 and CXL is a high performance platform. It provides full bidirectional support of x4, x2, and x1 at data rates up to 32 GT/s. With 64 GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express data streams. Two Summit T54 systems can be connected together to achieve a full x8 lanes at 32GT/s.

The Summit M5x Protocol Analyzer for PCIe 5.0 and CXL has full bidirectional support of xx8, x4, x2, and x1 at data rates up to 32 GT/s. With128GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express and CXL data streams. It can also be licensed with jammer capabilities for both PCIe 4.0 and NVMe for inline debugging. In this special inline mode it will support protocol capture and analysis for x16, x8, x4, x2, and x1 at data rates up to 16 GT/s.

The Summit T416 protocol analyzer has full bidirectional support of x16, x8, x4, x2, and x1 at data rates up to 16 GT/s. With128GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express data streams.

The Summit T48 protocol analyzer has full bidirectional support of x8, x4, x2, and x1 at data rates up to 16 GT/s. With 64GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express data streams.

The Summit T3-16 protocol analyzer has full bidirectional support of x16, x8, x4, x2, and x1 at data rates up to 8 GT/s. With 8GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express data streams.

The Summit T3-8 protocol analyzer has full bidirectional support of x8, x4, x2, and x1 at data rates up to 8 GT/s. With 4GB of trace memory, it offers enough capacity for analyzing and recording extensive PCI Express data streams.

Ideal for embedded systems monitoring and analysis is the Summit T28, smaller and a more cost effective PCI Express protocol analyzer for x8 lanes at 5GT/s. While all of the Summit analyzers support PCIe storage protocols like NVM Express, SATA Express and SCSI Express, the Summit T34 is addresses PCIe storage analysis with a small, portable form factor, x4 lane width and a deep recording buffer of 32 GB of memory. For portability and ease-of-use the Summit T24 protocol analyzer offers analysis support for x1-x4 lanes at 2.5/5GT/s. The Summit T24 is Teledyne LeCroy's most optimized and low cost analyzer for analysis of PCIe 2.0 add-in-boards.

All Summit analyzer platforms use a proprietary PCI Express connector for probing. Teledyne LeCroy features the largest selection of PCIe based interposers and probing solutions. Teledyne LeCroy's PCI Express Protocol Analyzer solutions employ non-intrusive and transparent probing technologies thereby allowing fully unaltered data pass-through. In addition, it leverages the intuitive and powerful Teledyne LeCroy’s Trace expert software system, embedding a deep understanding of the PCI Express protocol hierarchy and intricacies and presents this knowledge to the user in a colorful, intuitive and easy to use graphical display, allowing users to quickly capture and validate PCI Express product designs. These analyzers enable IP, semiconductor, switch, software and system developers as well as add-on card vendors to quickly identify protocol violations and ultimately reduce development and debugging time.

Developers can use Teledyne LeCroy's PCI Express Protocol solutions to easily capture and decode PCI Express Transaction Layer Packets (TLPs), Data Link Layer Packets (DLLPs), and low-level link traffic, including Training Sequences and Skip Ordered-sets. Some of the errors detected include: 8b/10b errors, such as invalid symbols and incorrect running disparity; CRC errors; idle data errors; and EDB (End-of-Packet Bad) errors. They also provide a detailed display of split transactions, correlating requests transmitted from one PCI Express endpoint with completions received from the endpoint at the opposite end of the link.

Teledyne LeCroy is well known for its technical leadership. Customers have come to depend on Teledyne LeCroy supporting protocols while they are early in development when these tools are essential.

The PCI Express exercisers can generate PCI Express transactions, observe behavior, and perform both stress testing and compliance testing. The Summit Z516 supports the PCIe 5.0 Specification ("Gen5"). The Summit Z516 Exerciser supports up to x16 lane widths at data rates of 32 GT/s. As complete solutions, the Summit family of products give you the unique ability to record (capture) live traffic, modify the traffic, and then playback the exact data stream, or "script," using the exerciser.

Teledyne LeCroy offers an integrated and automated compliance testing system, including Summit Z416 and Test Platform, approved by the PCI-SIG® as a standard tool for compliance testing for developers working with both the PCIe 3.0 and 4.0 specifications. In addition, the Summit Z3-16 exerciser is the only approved tool to run the UNH-IOLs NVM Express Conformance Tests. These tests are required for the NVM Express Integrators test.

The Summit Z416 exerciser is Teledyne LeCroy's fifth generation PCI Express (PCIe) protocol exerciser, leveraging years of experience in providing advanced protocol test tools to the PCI Express community. Supporting traffic generation at data rates to 16 GT/s with link widths up to 16 lanes, the system is designed for developers who need a protocol test system supporting the PCI Express 4.0 specification.

In addition to traffic generation, the system also supports protocol analysis capability, featuring the industry-standard CATC Trace as well as a wide variety of other traffic displays and data reports. The Summit Z416 supports full traffic generation and device/host emulation, as well as providing the industry a platform for development of standardized compliance test suites. In addition the system provides error injection functions to enable developers to test error recovery routines important to reliable interoperability of PCI Express 4.0 products.

	Title	Time
	Leveraging Debug, Error Injection and Statistics Option with DesignWare IP for PCI Express	4:17
	PCI Express 4.0 Interoperability Between Synopsys and Teledyne LeCroy	2:44

Intuitive software controls blend sophisticated traffic generation and analysis capability with ease-of-use, allowing test suites to be rapidly customized to meet specific test requirements. One feature that helps troubleshoot PCIe links is the ability to fully exercise the Link Training & Status State Machine (LTSSM) transitions. The powerful scripting language also allows for the creation of Transaction Layer Packets (TLPs) and Data Link Layer Packets (DLLPs) at PCIe 4.0 data rates of 16 GT/s. Flow Control and ACK/NAK's policies and structures can be defined and generated under user control. Features addressing LTSSM structures include providing bus traffic to emulate the all states of the LTSSM from the Detect state, to the L0 state and maintaining the L0 state between the host and device. The exerciser also supports lane reversal and can control all polarity and scrambling configurations. An important feature to note is that traffic emulation supports dynamic equalization and Skip EQ training and can handle autonomous speed switching between all combinations of speeds. The exerciser also has the capability to perform error injection for training sequences, as well as standard traffic, both at the packet level and on a per lane basis. Packet fields not explicitly specified by the user are generated automatically (such as packet numbering and CRCs). The configuration space can be emulated for any device including endpoints, bridges and switches. Support for all PCIe 4.0 data rates allows the Summit Z416 to produce test cases that test the device's ability to auto-negotiate data rates with other devices. In addition, the ability of the Summit Z416 to produce a wide variety of programmed traffic allows the user to introduce controlled error conditions. As an example, a trace file captured in the Analyzer can be exported and used as the basis for a test script, with selected programmed errors, introduced at critical stages to test the device's ability to recognize an recover from error conditions. This allows for detailed testing of simple error recovery and complex multiple error conditions, creating more resilient products that perform well even under less than ideal conditions.

The Summit Z416 can also support up to sixteen (16) lanes of protocol analysis. Using its high speed trace memory (up to 8 GB), the Summit Z416 can monitor, capture, decode and analyze PCIe protocols with data rates up to 16GT/s (Gen4). The application display is highly configurable and can be modified to most users' debugging styles. Many features are available including a hierarchical display, protocol traffic summaries, detailed error reports, timing calculators, bus utilization graphs, and the ability to create userdefined test reports allowing developers to troubleshoot intricate problems and finish their projects on time. PCIe storage decodes such as NVMe, SATA Express (AHCI and ATA), SCSI Express (PQI and SOP), TCG (Trusted Computing Group), Precision Time Management (PTM) and virtualization decode such as Single and Multi-Root I/O Virtualization (SRIOV and MRIOV) as well as Address Translation Services (ATS) are available to broaden its capabilities to many different industry segments.

PXP-400 Test Platform provides Host Emulation Teledyne LeCroy's PCIe 4.0 Test Platform for the Summit Z416 Protocol Exerciser provides a convenient, powerful and flexible two CEM compliant backplane for PCIe devices at data rates up to 16 GT/s and with lane widths up to x16. The Test Platform allows the Summit Z416 to act as a host system, enabling extensive protocol-level esting of PCIe devices. For use as a host emulator, the Summit Z416 is plugged into one of the PCIe x16 slots and connected to the power source, then the Device Under Test (DUT) is plugged into the alternate PCIe x16 slot with slot power provided to the DUT by the Test Platform. In addition to using the Test Platform with the Teledyne LeCroy Summit Z416, the user can connect two of their own devices and use the Test Platform as a PCIe backplane.

Two test fixtures are also available to help with testing PCIe 4.0 devices: a PCIe Verification Load Board (VLB) for testing PCIe platforms such as server or mother boards, and the PCIe Validation Base Board (VBB) for testing PCIe Add-in Cards. Each of these test fixtures will aid developers in conducting electrical tests.