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Protocol Analyzers

MIPI

The M-PHY specification from the MIPI Alliance provides flexibility and speed for developers in the mobile computing market. The technology is aimed at next generation smart phones, tablets and other low power mobile computing devices. The M-PHY currently runs at GEARs 1/2/3 per lane in each direction, providing asymmetrical lane operation for up to 4-lane device configurations.

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Eclipse X34 MIPI M-PHY Protocol Analyzer   The Teledyne LeCroy Eclipse MIPI M-PHY protocol analyzer is for customers developing M-PHY GEAR 1/2/3 at up to x4 lane width. Supporting MPCIe and SSIC, this protocol analyzer is the first to support the PCIe 3.1 specification. M-PCIe combines the PCI Express (PCIe) protocol layer with the low power M-PHY physical layer bringing high-end PCIe performance and software capabilities to low power mobile devices. SSIC is the USB-IF specification for SuperSpeed Interchip protocol and runs 5Gps USB traffic over the MIPI MPHY bus.