Test engineers validating early SAS components experienced more problems successfully linking between devices when protocol test systems were added to the line. The technical hurdles introduced by dynamic equalization present unique challenges for bus analyzers that few anticipated. Previously reliable approaches used for testing 6 Gb/s SAS have proven to be problematic at 12 Gb/s due to signal degradation. Distortions created by conventional active probe circuitry within the analyzer can impair link training, dramatically lengthen setup time, and actually prevent 12 Gb/s link up.

The root of this problem can be traced to the prevalence of Inter Symbol Interference (ISI) on high speed serial links. To offset the jitter and attenuation, these technologies increasingly rely on equalization to optimize the signal on both the channel’s transmitters and receivers. SAS 3.0 subsystems are designed to operate at the full 12 Gb/s data rate over long copper cables (< 10m) and PCB traces. Due to the wide range of trace, cable, and expander topologies, equalization must be tuned for each system. Therefore SAS 3.0 has adopted a self-tuning equalization process similar to that found in PCI Express 3.0. Both technologies rely on intelligent receiver’s that use back-channel communication to adjust pre-emphasis at the far-end transmitter. The receiver also adjusts its own equalizer settings to get optimum channel performance and ISI compensation. This elaborate tuning protocol is performed in-system, during each and every link bring-up.

Test and Measurement tools such as protocol analyzers and oscilloscopes sit in-line in order to monitor communication on the link. No probing method is completely non-intrusive. Ideally, the insertion of such tools should have minimum distortion and impact on the physical characteristics of the channel under test. During the development of new specifications, the standards committees will often pay greater attention to testability of the physical layer channel. At the protocol layers, testability is often an afterthought as test equipment vendors devise “workarounds” to try and meet the required link budgets. The increasing reliance on dynamic equalization in high-speed signaling make design of non-intrusive bus “sniffers” very challenging. This article examines several probing approaches and their effect on testing at the protocol level.

Traditional Non-Intrusive and Active Probe Implementations

Older generations of serial communication protocol analyzers used both active and non-intrusive probing designs for attachment to the communication channels under test. Non-intrusive probing was traditionally implemented with high impedance tapping on a bypass signal path. In most cases, the amount of energy coupled to the analyzer system should constitute 15% or less of the signal’s energy.

Figure 1 describes the traditional Non-Intrusive probing technique. As can be seen in the figure, the SAS signals are routed directly from one connector to the other, and on each path there are high impedance resistors that tap the SAS signals, and forward them to the analyzer’s receiver circuits.

Figure 1:

Traditional Non-Intrusive Probe

The Non-Intrusive probe (Figure 1) is designed to maintain most of the signal physical layer attributes, while adding some jitter and attenuation due to the tapping resistors, extra board traces and connectors on the path from the HBA (host bus adapter) to the HDD. Variations of this design are used extensively with oscilloscope probing; but protocol test engineers face a key drawback with this approach. Namely, the amount of energy coupled from the original signal will be so small at these speeds that the protocol analyzer’s receiver won’t be able to recover the data correctly. Decreasing the tap resistor adds more loading effectively lowering the signal amplitude to such point where the link will not train and fail to link up.

Figure 2, describes the Digital Re-timer approach where the bus analyzer equipment represents an active node in the network. Traditionally implemented with signal buffers or back-to-back transceivers, here the analyzer recovers the clock with its own CDR and re-drives the signal back to the channel under test. Analyzers that re-time the signal have largely lost favor as they add latency and potentially mask problems between DUTs. This probing approach is considered the most “intrusive” and is not preferred for debugging low-level issues as it canalter link layer behavior between devices.

Figure 2:

Digital Re-Timer Active Probe

Figure 3 describes an Active Limiting Amplifier probe technique which is implemented with non-retimed signal buffers. For SAS 2.0 (6 Gb/s), bus analyzer vendors typically relied on this type of probe design which tapped the signal using “splitter” or signal buffers. These active components act as re-drivers in the middle of the channel. Less intrusive than the re-timer design, this approach still has been shown to badly impair the equalization algorithms in SAS 3.0.

Figure 3:

Limiting Amplifier Active Probe

Limiting amplifiers drive their outputs to a preprogrammed voltage regardless of input signal voltage. This non-linear behavior alters the waveform in a way which prevents proper equalization at the receiving device. This behavior also blocks the effect of the signal emphasis added by the far-end transmitter, preventing the receiver from properly evaluating each transmit EQ coefficient.

To compensate for this distortion, test platforms utilizing these limiting amplifiers often provided RX and TX equalization which served as a mechanism to calibrate the probe circuit. However they need to be manually programmed and cannot participate in the SAS 3.0 dynamic equalization procedure. Manual tuning of these circuits is time consuming and becomes more complex as data rates increase. This tuning also results in a set of RX and TX EQ values for the probe that only work for a single test setup. Test engineers are faced with calibrating the test equipment each time the cables or devices are changed.

Active Limiting Amplifier probe techniques were widely adopted at the 6Gbps SAS 2.0 speed but this was prior to the use of dynamic active equalization. At 12 Gb/s speeds, all of the conventional probing techniques above are problematic due to signal degradation.

Linear Amplifier Probe Implementations

The limitations with traditional passive repeater techniques described above have compelled equipment providers to look for new solutions to this probing challenge. The most promising new probing scheme deploys an analog signal splitter, which takes the input signal and drives two duplicates of the original signal to its outputs. Due to the linear behavior of the circuit, the dynamic equalization process can complete normally as the receiver can see the impact of changes to the transmitter as requested. The cable and connectors, plus the probe circuit, all have linear behaviors. Essentially, the probe circuit becomes part of the channel-under-test and can be tuned as intended by the SAS-3 dynamic link training. With this new technique, both dynamic equalization on the DUTs and signal fidelity on the analyzer can be satisfied.

Figure 4 describes an example of the Transparent Acquisition Probing, known as T.A.P.3™ which is used by Teledyne LeCroy in their SAS 3.0 and PCIe 3.0 bus analyzers. The circuit comprises several linear amplifiers

Figure 4:

Linear Amplifier Probe

and signal conditioners. It was designed, simulated and implemented so the overall response from input connector to the output connector, and from the input connector to the analyzer’s receiver circuit are nearly flat from frequencies well below 1Ghz and up to 8GHz. With this response, both the system under test and the Analyzer’s receiver circuit benefit from receiving signals that are very close in physical behavior to the original signal. With this implementation, the dynamic equalization protocol is passed transparently through the protocol analyzer.

Figure 5 below shows the measured response from the HBA connector to the HDD connector on one of the paths on Teledyne LeCroy’s Sierra SAS 12 Gb/s protocol analyzer. The nearly flat response guarantees predictable behavior of the path from connector to connector inside the analyzer probe section. This behavior ensures maximum signal energy transmission through the probe with minimum distortion.

Figure 5:

Linear amplifier probe response measurements. Left: Source input signal. Right: Output signal from the probe

Please note that the analyzer’s mini SAS-HD connector’s responses were removed from the overall channel response as there is no way to compensate for crosstalk between active channels within the connector and on the cables that are used to connect to the devices-under-test. The system under test must have enough margins to handle the extra cable (two cables are used to connect to a test tool instead of one in a standard system) and the two extra mini SAS-HD connectors on the analyzer.

This article highlights the challenges faced when designing probing schemes for high speed protocols that rely on dynamic equalization. The goal is to introduce minimum interference on the signal under test so that the compensation mechanisms will work correctly with and without the probe loading. The adaptive characteristics of SAS 3.0 equalization techniques are only beneficial if they can pass through the protocol analyzer transparently.