Model | 2249A | 2249SG | 2249W | 2259B | 4300B* |
No. of Channels | 12 | 12 | 12 | 12 | 16 |
No. of Bits | 10 | 10 | 11 | 11 | 11 |
CAMAC Size | #1 | #2 | #1 | #1 | #1 |
Charge (Q) or Voltage (V) | Q | Q | Q | V | Q |
Analog Inputs | DC-coupled, 50 ohm, Linear range -2 mV to -1 V. Note 1 | DC-coupled, 50 ohm, Linear range -2 mV to -1 V. Note 1 | AC-coupled, (2 msec Tc) 50 ohm, Linear range 0 to -2 V. Note 1 | DC-coupled, 50 ohm, Negative going pulse � 50 nsec rise time or bipolar pulses with negative lobe first. Note 1 | DC-coupled 50 ohm |
Full Scale | -256 pC �5% | -256 pC �5% | -512 pC �5% | -2 V �5% | -480 pC �5% |
Maximum Resolution | -0.25 pC | -0.25 pC | -0.25 pC | -1 mV | -0.25 pC |
Gate Input | Common gate, 50 ohm, -600 mV or greater to enable. Width 10 to 200 nsec. (Actual limit approx. 2 �sec with reduced accuracy.) Notes 2,3 | Separate gates, 50 ohm, -600 mV or greater to enable. Width 10 to 200 nsec. (Actual limit approx. 2 �sec with reduced accuracy.) Notes 2,3 | Common gate, 50 ohm, -600 mV or greater to enable. Width 30 nsec to 10 �sec. Notes 2,3 | Common gate, 50 ohm, -600 mV or greater to enable. Width 100 nsec to 5 �sec. Notes 3,5 | Common gate, differential GOR levels. Width 50 to 500 nsec. Note 6 |
Conversion Time | 60 �sec | 60 �sec | 106 �sec | 106 �sec | 8.5 �sec (11 Bits) |
Special Features | n/a | Separate gates input | Wide range of gate widths | n/a | Includes high speed data output bus |
Model | 2249A | 2249SG | 2249W | 2259B | 4300B* |
No. of Channels | 12 | 12 | 12 | 12 | 16 |
No. of Bits | 10 | 10 | 11 | 11 | 11 |
CAMAC Size | #1 | #2 | #1 | #1 | #1 |
Charge (Q) or Voltage (V) | Q | Q | Q | V | Q |
Analog Inputs | DC-coupled, 50 ohm, Linear range -2 mV to -1 V. Note 1 | DC-coupled, 50 ohm, Linear range -2 mV to -1 V. Note 1 | AC-coupled, (2 msec Tc) 50 ohm, Linear range 0 to -2 V. Note 1 | DC-coupled, 50 ohm, Negative going pulse � 50 nsec rise time or bipolar pulses with negative lobe first. Note 1 | DC-coupled 50 ohm |
Full Scale | -256 pC �5% | -256 pC �5% | -512 pC �5% | -2 V �5% | -480 pC �5% |
Maximum Resolution | -0.25 pC | -0.25 pC | -0.25 pC | -1 mV | -0.25 pC |
Gate Input | Common gate, 50 ohm, -600 mV or greater to enable. Width 10 to 200 nsec. (Actual limit approx. 2 �sec with reduced accuracy.) Notes 2,3 | Separate gates, 50 ohm, -600 mV or greater to enable. Width 10 to 200 nsec. (Actual limit approx. 2 �sec with reduced accuracy.) Notes 2,3 | Common gate, 50 ohm, -600 mV or greater to enable. Width 30 nsec to 10 �sec. Notes 2,3 | Common gate, 50 ohm, -600 mV or greater to enable. Width 100 nsec to 5 �sec. Notes 3,5 | Common gate, differential GOR levels. Width 50 to 500 nsec. Note 6 |
Conversion Time | 60 �sec | 60 �sec | 106 �sec | 106 �sec | 8.5 �sec (11 Bits) |
Special Features | n/a | Separate gates input | Wide range of gate widths | n/a | Includes high speed data output bus |