Introduction

Complete PCI Express 4.0 electrical compliance testing involves procedures such as inter-symbol interference (ISI) board characterization, stressed eye calibration, transmitter testing, link-equalization testing and PLL testing. Follow the 10 steps listed here to help ensure success.

1. Select Your Instruments

To perform only transmitter testing, you need an oscilloscope such as the Teledyne LeCroy LabMaster 10 Zi-A . For all other testing, including link equalization and PLL testing, you also need a bit-error rate tester (BERT). Teledyne LeCroy has partnered with Anritsu to develop a fully automated solution based on the LabMaster 10 Zi-A and the Anritsu MP1900A SQA-R BERT.

Another useful piece of equipment is the WavePulser 40iX. Although not used during compliance testing, it does provide a way to characterize the ISI board. Knowing the specific amounts of insertion loss through different pairs on the board enables you to meet the channel-loss requirements specifically for PCI Express 4.0. You can characterize the ISI board with a VNA or with a TDR, but the WavePulser 40iX is low-cost and effective, having four channels and 40 GHz of bandwidth. For measuring the 8 GHz Nyquist frequency for the PCIe 4.0 data rate of 16 GT/s, it works very well.

2. Choose Software Options

You will also need software for the compliance testing, such as the Teledyne LeCroy QualiPHY
PCIE4-TX-RX
transmitter and receiver compliance testing software, which is a key to automating the measurements using the oscilloscope and BERT. In addition, the ProtoSync option links Teledyne LeCroy's full Protocol Analysis software with the oscilloscope electrical traces, allowing you to see what is going on at the packet level during link training when decoding the data.

Before you begin testing, make sure you have the latest versions of software and instrument firmware to keep up with bug fixes and changes in the standard. In particular, make sure you have the latest version of SigTest ; at the time of this writing the latest version for PCIe 4.0 is 4.0.52.

3. Order Test Boards

The PCI-SIG offers the 4.0 CEM kit, which includes all the test boards you will need: the PCIe-CLB compliance load boards, the CBB compliance base board, and the PCI-VAR-ISI board (Figure 1).

4. Gather Accessories and Cables

You will also need some accessories, such as the TF-PCIE4-CTRL controller module, which plugs into the aux input port on the oscilloscope and includes three connections for controlling the power, reset and mode toggles for your devices. A 100 MHz pulse is used to toggle the device under test, which allows you to change which test patterns are being generated. Changing those modes also requires sometimes programmatically resetting the device or controlling the power to reset the device.

As for cables, Figure 2 represents a complex transmitter initial equalization test setup illustrating all the cables that you will need, including one SMA to BNC cable running from the BERT PPG output to the oscilloscope's aux trigger input. In addition, several sets of phase-matched SMA cables run from the BERT to the test boards, and other sets of cables run back to the oscilloscope. Other necessary components include power splitters and DC blocks.

5. Characterize the ISI Board

The next step is characterizing the ISI board. Characterization is required because the loss through a pair of FR4 board traces can almost double depending on the environment and specifically the humidity. If you are in a humidity-controlled environment, you may not need to characterize the ISI board very frequently. If you're in an environment that isn't controlled, you may want to do this periodically before you begin testing. Also, if you have just received these boards from PCI-SIG, you may want to let them sit for a day or two before you take your measurements.

Note that the full system loss for PCI Express 4.0 is 28 dB, with 8 dB of that coming from the add-in card (including 3 dB of package loss) and 20 dB coming from the system board (including 5 dB of package loss). To guide you through the characterization process, the PCI-SIG offers an interactive spreadsheet (Figure 3). You enter measured values in the boxes with bold outlines in column C, and the spreadsheet does the calculations, showing how close you are to targeted values. Spreadsheet tabs include diagrams showing how to connect your instrument to the board.

Figure 4 is a short-channel insertion-loss measurement taken by the WavePulser 40iX, showing that at 8 GHz the insertion loss is -1.628 dB. The setup portion of the display shows an end frequency of 10 GHz with 2,000 points acquired. The instrument is also set to enforce passivity, reciprocity and causality, which helps smooth out the trace and prevents active gain. Sequence control is set to normal.

Figure 5 shows the WavePulser 40iX setup for a full system measurement, including the ISI board with short and long traces on either side of the CBB and CLB boards. For this setup, insertion loss is about 27.44 dB.

Figure 5. The WavePulser 40iX setup (left) shows an insertion loss of about 27.44 dB (right).

6. Connect the BERT

The next step requires that you connect the BERT to the oscilloscope and make sure that QualiPHY (installed on the oscilloscope) can automate the BERT's operation. The oscilloscope talks to the BERT using NI VISA, which you will have to download and install if it is not already installed. The physical connection is simply an Ethernet connection. Make note of the IP address (you can manually set it to 10.10.10.1) because you will need to enter it into QualiPHY.

When the BERT powers on, it should by default start the standard BERT(SI) application, which will display a pop-up of the wiring and cabling needed to connect the instrument modules. Then, launch the Anritsu MX183000A high-speed serial data test software and use its application selector tool to select "PCIe Link Training" from a dropdown list.

7. Launch QualiPHY and Begin Calibration

The next step is to launch QualiPHY on the oscilloscope. QualiPHY configurations automatically select the calibrations and tests needed for your device type, while allowing you to easily edit variables unique to your test setup, such as the BERT's IP address (Figure 6).

Figure 6. QualiPHY automates tests such as preset, Rj and Sj calibration (left). You can easily edit variables unique to your setup, such as the BERT IP address (right).

 

With the software running and the oscilloscope communicating with the BERT, the calibration process can begin. For successive steps during the process, QualiPHY will present connection diagrams. Figure 7, for example, shows the required connections for the differential-mode interference (DMI) and common-mode interference (CMI) calibration process, which makes use of trace pairs on the ISI board. The calibration process will continue through final eye calibration, where the system will look at the total eye-opening height and width.

8. Begin the Transmitter Tests

Next you can begin the transmitter tests, for which you can specify both 8 GT/s and 16 GT/s preset tests and signal-quality tests, as well as 16 GT/s pulse-width jitter tests. As was the case for the characterization process, QualiPHY provides connection diagrams when test setups need to be changed. For the Gen 3 8 GT/s tests the SigTest software models the full-channel signal loss, and you do not need the ISI board. You do need it for the Gen 4 16 GT/s tests, and when QualiPHY begins those tests, it displays a connection diagram (Figure 8) showing how to connect to the ISI board. The transmitter tests can take an hour per lane. QualiPHY displays a progress bar and lists tests that have passed or failed as the test progresses.

With the tests complete, QualiPHY produces an HTML report that lists the various tests' pass/fail status and provides hyperlinks to more details for each test. It also displays eye diagrams, such as the one for a transition bit at 2.5 GT/s on lane 0 shown in Figure 9.

9. Initiate the Link Equalization Tests

The next step is to perform three sets of link equalization tests. Transmitter initialization TX EQ tests check patterns for equalization. For transmitter link equalization response tests, the protocol-aware BERT changes device presets and enables timing measurements on the oscilloscope. These tests make use of the complex cabling setup shown in Figure 2. For the third set of tests, receiver link equalization tests, the BERT places the device in a loopback mode, runs a stressed eye through an ISI channel and verifies that the bit-error rate is acceptable. When generating a report of the results, QualiPHY makes use of the PCIe protocol decoder to provide in-depth analysis by fully decoding the traffic on the PCIe bus so you can view protocol messages—not just 1s and 0s. The timing diagram in Figure 10, for example, shows that preset P0 required 115 ns to change, well within the 1 s limit.

10. Perform PLL Test

Finally, you can perform PLL bandwidth tests on an add-in card. The test applies a calibrated sinusoidal jitter value and measures the periodic jitter at the device transmitter. The result is a curve plot representing the magnitude of jitter at each frequency, which you compare with the specification to determine whether the device passes.

Conclusion

PCI Express 4.0 electrical compliance testing is an exacting process that requires the right combination of instruments, software, test boards and cabling. To speed the process, you can combine the Teledyne LeCroy LabMaster 10 Zi-A oscilloscope and the Anritsu MP1900A SQA-R BERT and automate the instruments using QualiPHY software. The software will guide you through the process, displaying connection diagrams and generating comprehensive reports.

Note: This application note is based on the video How to Perform PCI Express 4.0 Compliance Testing . The video provides full details on test setups as well as step-by-step instructions on using the software.