Software Options


The Teledyne LeCroy QPHY-DDR3 Test Solution is the best way to characterize DDR3, DDR3L, and LPDDR3 memory interfaces. Capable of performing measurements on 800 MT/s, 1066 MT/s, 1333 MT/s, 1600 MT/s, 1866 MT/s, 2133 MT/s and custom speed grades, QPHY-DDR3 has a full suite of Clock, Electrical, and Timing tests as specified by the JEDEC Specification.

Explore QPHY-DDR3 Explore QPHY-DDR3
Key Features
  • DDR3 test coverage as described by JESD79-3F
  • DDR3L test coverage as described by JESD79-3-1A
  • LPDDR3 test coverage as described by JESD209-3B
  • Support for:
    • 800 MT/s
    • 1066 MT/s
    • 1333 MT/s
    • 1600 MT/s
    • 1866 MT/s
    • 2133 MT/s
    • Custom speeds
  • Fastest way to gain confidence in your DDR3 interface by measuring a large number of cycles and reporting statistically relevant results
  • Fully annotated worst case measurement screenshot captured and displayed in report including trace labels and pertinent voltage levels
  • Stop on test/failure capability allows the user to pause at a particular test and review the measurement on the oscilloscope display

More Measurement Cycles Provides Highest Confidence in Less Time

Due to the high level of variability in DDR3 measurements, it is important to measure a large number of cycles. By measuring a large number of cycles in a very short period of time, the user can be more confident that they are catching the true maximum and minimum points for their measurement. In many cases, QPHY-DDR3 will perform several thousand measurements in the same time competitive equipment will perform less than 100. This allows you to achieve statistical relevance in a single run of QPHY-DDR3 without requiring multiple acquisitions over a long period of time.

Advanced Debug Capability

Using the “Stop on Test” capability built in to QPHY-DDR3, the user can pause the testing at the completion of each individual test. QPHY-DDR3 will prompt the oscilloscope to save the panel file to preserve the current state of the oscilloscope. The user is then free to perform additional debugging of any particular test to aid root cause analysis. Root causes of failure can be quickly and easily found using all of the advanced serial data tools within the oscilloscope. These include: SDA III, Eye Doctor™ II, WaveScan™, Histograms, Tracks, and many more—making it easy to correlate anomalies with other observed behaviors. Once the user has completed debugging that particular test, they simply click on the “Ok” button in QPHY-DDR3 to resume running the remainder of the selected tests.

Clock Tests

These tests perform all of the clock tests as described by the appropriate JEDEC specification. These include average clock period, absolute clock period, average high/low pulse width, absolute high/low pulse width, half period jitter, clock period jitter, cycle-to-cycle period jitter and cumulative error over n period tests.

Electrical Tests

Shown above, the SlewR test measures the slew rates of the data, strobe, and clock signals. A 2 Mpt acquisition was taken and all of the write bursts were identified. Then every rising edge slew rate was measured. In this case over 1,400 slew rate measurements were performed. As shown above, the worst instance of this measurement will be displayed on the screen. Additionally, the “Stop on Test” ability can be used to perform further analysis on this test to determine the root cause of a failure.

Timing Tests

Shown above, the tDQSCK test verifies the strobe output access time from the clock signal. Similar to the electrical tests, a 2 Mpt acquisition was taken and all of the read bursts were identified. Then the time between every strobe edge and its associated clock were measured. In this case over 10,000 tDQSCK measurements were performed. Shown above, the worst instance of this measurement is displayed on the screen. An additional probe can be utilized to capture a separate signal on the board to aid in failure analysis.

Eye Diagrams

Eye Diagrams are a powerful tool for debugging serial data signals. QPHY-DDR3 enables the user to create eye diagrams of both the Read and the Write data bursts to ensure that the signal integrity is sufficient such that the data will be sampled properly by the receiver. Additionally, the Eye Diagram for the Data Signal and the Strobe signal are shown at the same time to ensure proper strobe timing.

QualiPHY is designed to reduce the time, effort, and specialized knowledge needed to perform compliance testing on high-speed serial buses.
  • Guides the user through each test setup
  • Performs each measurement in accordance with the relevant test procedure
  • Compares each measured value with the applicable specification limits
  • Fully documents all results
  • QualiPHY helps the user perform testing the right way—every time!
Supported Oscilloscopes  
6 GHz, 20 GS/s, 4 Ch, 20 Mpts/Ch
(40 GS/s and 40 Mpts/Ch in interleaved mode)
50 Ω and 1 M Ω  Input
WavePro 760Zi-A
6–16 GHz, 40 GS/s, 4 Ch, 20 Mpts/Ch
WaveMaster with 15.3" WXGA Color Display.
50 Ωand 1 M ΩInput
WaveMaster 806Zi-A, 808Zi-A, 813Zi-A, 816Zi-A


Recommended Probes  
WaveLink 6 GHz, 2.5 Vp-p Differential Probe System D610-PS
WaveLink 6 GHz, 5 Vp-p Differential Probe System D620-PS
WaveLink 8 GHz, 3.5Vp-p Differential Probe System D830-PS


DDR3 Recommended Bandwidth Recommended Oscilloscope Recommended Probe
DDR3 (1600 MT/s or less) 6 GHz WavePro 760Zi-A D610-PS/D620-PS (Qty.3 or 4)
DDR3 (11866 MT/s or more) 8 GHz WaveMaster 808Zi-A D830-PS
(Qty.3 or 4)
DDR3L (All Speeds) 8 GHz WaveMaster 808Zi-A D830-PS
(Qty.3 or 4)
LPDDR3 (All Speeds) 6 GHz WavePro 760Zi-A D610-PS/D620-PS (Qty.3 or 4)