Thank you for your interest in LeCroy's DDR3 memory testing solutions.
New DDR3 Debug Techniques
Fast Setup, Zero Calibration Time
Roy Chestnut
Director, Peripherals Product Line
The Complex nature of DDR3 signaling has long been a problem for engineers attempting to validate and debug DDR3 implementations. The traditional approach for debug is the use a general purpose logic analyzer with dedicated probes or interposers to tap the necessary signals.
Please enter your email address below to download
New DDR3 Debug Techniques
For additional information contact
LeCroy
1-800-909-7211 or 408-653-1262;
[email protected]