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Protocol Analyzers

Summit Z3-16 Exerciser with SMBus Support

The Summit Z3-16 with SMBus Support is a critical test and verification tool intended to assist engineers in developing and improving the reliability of their systems. The exerciser can emulate PCI Express root complexes or device endpoints, allowing new designs to be tested against corner case issues. In addition, it can emulate SMBus traffic as a master or slave.

Explore Summit Z3-16 Exerciser with SMBus Support Explore Summit Z3-16 Exerciser with SMBus Support
Summit T416 Analyzer  The Summit T416 Protocol Analyzer captures, decodes and displays PCIe 4.0 protocol traffic data rates for x1, x2, x4, x8, x16 lane widths
Summit T3-16 Analyzer  The Summit T3-16 Protocol Analyzer captures, decodes and displays PCIe 3.0 protocol traffic data rates for x1, x2, x4, x8, x16 lane widths
Summit T3-8 Analyzer  The Summit T3-8 Protocol Analyzer captures, decodes and displays PCIe 3.0 protocol traffic data rates for x1, x2, x4, x8 lane widths
Summit T34 Analyzer  The Summit T34 Protocol Analyzer captures, decodes and displays PCIe 3.0 protocol traffic data rates for x1, x2, x4 lane widths
Summit T28 Analyzer  The Summit T28 Protocol Analyzer captures, decodes and displays PCIe 2.5GT/s and 5GT/s data rates for x1, x2, x4, x8 lane widths
Summit T24 Analyzer  The Teledyne LeCroy Summit T24 PCI Express analyzer is for customers developing PCIe 1.0 or 2.0 x4 lane width server, workstation, desktop, graphics, storage, and network card applications.
Summit Z3-16 Exerciser with SMBus Support  The Summit Z3-16 with SMBus Support is a critical test and verification tool intended to assist engineers in developing and improving the reliability of their systems. The exerciser can emulate PCI Express root complexes or device endpoints, allowing new designs to be tested against corner case issues.In addition, it can emulate SMBus traffic as a master or slave.
PCIe Compliance Testing  The UNH NVMe conformance tests run on the Teledyne LeCroy Protocol analyzer and exerciser. These tools support the necessary NVMe emulation capabilities to perform these tests.
PXP-100B Test Platform  The Teledyne LeCroy PXP-100B Test Platform provides a convenient means for testing PCIe cards with a self-contained portable and powered passive backplane. The PXP-100B provides power required for both cards under test, and an interposer can be used for connection to a protocol analyzer.

Teledyne LeCroy is the main supplier of protocol analyzers and exercisers to companies developing SSD and other similar storage products using the new NVMe, SATA Express and SCSI Express high-speed serial data standards. Protocol analyzers and exercisers are used by developers and validation engineers to directly record and examine data traffic on serial data communication links between devices and systems. This equipment enables developers to reduce debug and test schedules, lower engineering development costs on new products and meet aggressive time-to-market requirements.

 TitleTime
NVMe Protocol Analysis Features for Storage Development and Test36:27

As storage developers make the transition from legacy SAS and SATA protocol-based SSDs to the more advanced NVMe and SATA Express technologies, they are encountering limitations in available design and test tools including limited trace recording times and a lack of standardized analysis reports for PCIe-based storage. These two issues are significant for the newer technologies of NVMe and SATA Express due to the following:

  • High performance SSD testing can require recording data traffic beyond a few minutes. This is not possible for many protocol analyzers due to limitations in their recording architectures.
  • While some test tool suppliers have claimed support for the NVMe and SATA Express protocols, support for these protocols has remained minimal. This has hampered developer's productivity due to the use of reporting systems designed for the older technologies, which are not optimized for quality testing on NVMe and SATA Express products.

The Summit T34 protocol analyzer, specifically targeted at PCIe storage applications, now supports long trace recordings with a new NVMe Enhanced Mode. The Summit T34 can also be configured with up to 64 GB of trace recording memory. NVMe Enhanced Mode builds on and optimizes the existing deep buffer memory to allow users long recording time capability. Depending on the speed of the DUT (Device Under Test), the recording time can be maximized to up to several hours for a single trace capture. This feature is useful for tasks such as measuring performance or determining how well your Queue handling algorithms are functioning. An example of the metrics that are now available include the ability to measure the NVMe queue distribution over a sustained period of time. The ability to gather queue behavior for long periods helps driver and OS developers fine tune their applications and balance queue loads for optimized product performance.

With over a decade of experience in providing PCI Express, SAS/SATA and other serial data protocols with standardized error analysis and product performance reports, Teledyne LeCroy has now created an NVMe and SATA Express SSD Performance and Analysis capability. Trace Expert™, a new feature in the PCIe Protocol Suite, creates a detailed report that the SSD industry requires to obtain a common understanding of how their SSD or storage systems are operating and includes information on the necessary PCIe based components. Information such as NVMe queues, commands, doorbell and control registers and many other metrics are captured, analyzed and organized into a detailed report providing developers a comprehensive status document for their products including a wide range of performance statistics.

In addition to the standard storage protocols, all of our NVMe platforms also fully support, Trusted Computer Group (TCG), Single Root I/O Virtualization (SRIOV), Multi-Root I/O Virtualization (MRIOV) and Address Translation Services (ATS). A full list of capabilities, views and reports can be found on the product pages (listed below) for each of our analyzers.

NVMe over PCIe Specification Decoding and Analysis - NVMe Initialization Decoding
• Decode NVMe Commands
• Analyze NVMe Queues
• NVMe Multiple Pointer Based Transactions
• NVMe Power Management
• Extract the PCIe SSD Base Address automatically

The Summit Z3-16 with SMBus Support is a critical test and verification tool intended to assist engineers in developing and improving the reliability of their systems. The Summit Z3-16 with SMBus Support can emulate PCI Express root complexes or device endpoints, allowing new designs to be tested against corner case issues. In addition, it can emulate SMBus traffic as a master or slave.

The new Summit Z3-16 with SMBus Support builds on all of the same features as the previous Summit Z3-16 (traffic generator), adding support for SMBus traffic generation to PCI Express at the Gen3 data rates of 8 GT/s. The Summit Z3-16 Exerciser with SMBus Support, in combination with the Summit T34 Protocol Analyzer, provides a complete test and development environment for engineers working on new designs using PCI Express 3.0 and SMBus together. The Summit Z3-16 with SMBus works with standard PCIe 3.0 for other PCIe protocol analyzers as well.

The exerciser builds on the extensive programming and verification test libraries established over time with Teledyne LeCroy's PCI Express Exercisers, and provides the user a complete suite of test capability, including the ability to test products to the new PCI Express 3.0 specification.

  Title Time
Summit T3-16 PCI Express Protocol Analyzer Introduction Video 4:05
Synopsys and Teledyne LeCroy Showcase PCI Express 3.0 Interoperability at PCI-SIG 2010 3:04
Demo of Synopsys DesignWare PCI Express 3.0 with Teledyne LeCroy Protocol Test Suite 4:34
IDT PCIe Switch Demo using Summit T3-16 protocol analyzer 7:15
Cadence and Teledyne LeCroy work together supporting PCI Express 3.0 development and test 1:26
Xilinx Video: Industry’s first Gen3 x 16 PCIe solution built into a programmable device 2:30
PCIe 3.0 at 8.0 GT/s 3:17
NVMe Protocol Analysis Features for Storage Development and Test 36:27

The exerciser is a critical test and verification tool intended to assist engineers in developing and improving the reliability of their systems. It can emulate PCI Express root complexes or device endpoints, allowing new designs to be tested against known standards. As Teledyne LeCroy's fourth generation of PCI Express generators, the Summit Z3-16 with SMBus Support leverages years of experience in advanced protocol analysis test tools for emerging markets.

Intuitive software controls blend sophisticated analysis capability with ease-of-use, allowing test suites to be rapidly customized to specific product requirements. One of the many features that help troubleshoot PCIe links is the ability to exercise LTSSM state transitions. The powerful scripting language allows for the creation of Transaction Layer Packets (TLPs) and Data Link Layer Packets (DLLPs) at Gen3 data rates of 8 GT/s. ACK's or NAK's can be generated under user control. Packet fields not explicitly specified by the user are generated automatically (such as CRCs). The configuration space can be emulated for any device including endpoints, bridges and switches. Support for Gen1 (2.5 GT/s) and Gen2 (5 GT/s) data rates allows the exerciser to produce test cases that test the device's ability to auto-negotiate data rates with other devices.

In addition, the ability of the exerciser to produce a wide variety of programmed traffic allows the user to introduce controlled error conditions. As an example, a trace file captured on a Summit or PCIe Protocol Analyzer can be exported and used as the basis for a test script, with selected programmed errors introduced at critical stages to test the device's ability to recognize and recover from error conditions. This allows for detailed testing of simple error recovery and complex multiple error conditions, creating more resilient products that perform well even under less than ideal conditions.

Features Benefits
Script Level Traffic Generation Programmability to test PCI Express components with more precision and control
Convert Trace files into generation scripts Recreate failure scenarios by replaying recorded traffic
Manual Error Injection Verify fault handling and identify error recovery
Host/End-Point Emulation Support Enpoint emulation(and optional host emulation)allow for designed stress and pre-testing of end-point and host devices for product verification
Programmable Data Link Layer Ability to modify flow control, ACK/NAK, and retry behaviors
Flexible/programmable Transaction Layer User ability to define arbitrary sequence of transactions, payload generation,and conditional repeat of transactions provide users with maximum flexibility
Programmable reply timers Allows testing of ACK latency timeouts and retry mechanisms
Point and Click Script Editor Complex scripts can be created quickly and easily
Programmable Configuration space Test user defined endpoints
Link Training& Status State Machine(LTSSM)Testing Exercise LTSS state transitions for verification
Supports existing PETracer API Preserve investment in API Programs
Supports Legacy PETrainer Scripts Preserve investment in Legacy PETrainer Scripts

Emulate Gen3 Hosts and Gen3 Devices
Change speeds with easy to use interface
  • 2.5GT/s to 5GT/s
  • 2.5 GT/s to 8GT/s
  • 5GT/s to 8GT/s
  • 8GT/s to 2.5GT/s
  • 5GT/s to 2.5GT/s
  • 8GT/s to 5GT/s

Control Screen- Control root complex or endpoint's speed, width and state.