This full-day session is designed to provide engineers with a practical hands-on introduction to solutions and methods for the debug and characterisation of PCI Express Protocol links. It covers the basics of the PCI Express protocol, how a link is established, how flow is controlled and how endpoints are discovered , configured and managed from a host.
The course provides an introduction into using Teledyne LeCroy protocol analyzers to debug or view a PCI express link. Trainees will learn how to understand what the chip or IP is doing that is not visible to the host software stack or physical layer tools. Hands on labs will provide experience in setting up, triggering and interpreting PCIe traces and then move on to measuring link performance and verify compliance with the specification.
During this workshop Teledyne LeCroy will show you how, the developer can automatically validate their design decisions against all the standards; confirm if the configuration of link parameters and flow control options is valid and gets the best link utilization; know what is actually happening on the PCI Express link.
Attendees will learn methods for evaluating the operational characteristics of a PCI Express link using a Protocol analyzer and Analyzer / Exerciser combinations. Whether using your own or third party IP, or off the shelf components, this workshop will aim to provide the skills to aid successful PCI Express development.
The course is equally suitable for hardware engineers about to embark on a PCI Express development through to software engineers developing drivers in direct or virtualized environments.
Students are encouraged to bring their own laptops to the course with the application software pre-installed so they can take traces on their own setup.
Lunch will be provided and Students will receive a certificate recognizing their completion of this module
Who should attend:
Attendees will learn about:
Using a Protocol analyser to view a PCI Express Link
Analysing a protocol trace to understand:
Expose hardware and software operational characteristics
How to find the most common issues easily
Using protocol analyzer and exerciser combination to stress an endpoint
Extensively test device operation
Using automated validation software to check PCIe Link and Transaction layer operation
How to test a links behaviour when things that shouldn't happen, do happen.