Serial Data

LPDDR2

The Teledyne LeCroy QPHY-LPDDR2 Test Solution is the best way to characterize LPDDR2 memory interfaces. Capable of performing measurements on 466 MHz, 533 MHz, 667 MHz, 800 MHz, 900 Mhz, 1066 MHz and custom speed grades, QPHY-LPDDR2 has a full suite of Clock, Electrical and Timing tests as specified by the JEDEC Specifications.

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DDR Debug Toolkit   The DDR Debug Toolkit is designed to accelerate DDR design work in the early turn-on, validation and pre-compliance stages as users prepare for compliance testing. Integrated into the MAUI scope app, users can build out case by case scenarios with multiple analysis areas, perform decode and triggering on the Command Bus and dive into optimizing design stages with JEDEC specific eye diagrams, mask testing and DDR specific measurements.
QPHY-LPDDR2   The Teledyne LeCroy QPHY-LPDDR2 Test Solution is the best way to characterize LPDDR2 memory interfaces. Capable of performing measurements on 466 MHz, 533 MHz, 667 MHz, 800 MHz, 900 Mhz, 1066 MHz and custom speed grades, QPHY-LPDDR2 has a full suite of Clock, Electrical and Timing tests as specified by the JEDEC Specifications.

Support for testing 466 MHz, 533 MHz, 667 MHz, 800 MHz, 933 Mhz 1066 MHz and custom speed grades LPDDR2 signals

Fastest way to gain confidence in your LPDDR2 interface by measuring a large number of cycles and reporting statistical results

Fully annotated worst case measurement screenshot captured and displayed in report including trace labels and pertinent voltage levels

Stop on test/failure capability allows the user to pause at a particular test and review the measure on the oscilloscope display

Complete test coverage for tests as described by the JESD209-2B JEDEC Specification.