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Protocol Analyzers

Summit T54 Analyzer

The Summit T54 Protocol Analyzer captures, decodes and displays PCIe 5.0 protocol traffic data rates for x1, x2, x4 lane widths.

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Summit T516 Analyzer  The Summit T516 is targeted at high-speed PCI Express 5.0 and CXL I/O-based applications such as workstation, desktop, graphics, storage, and network card applications.
Summit Z516 Exerciser  The Summit Z516 is a PCIe 5.0 and CXL protocol traffic generation test tool used for critical test and verification intended to assist engineers in developing and improving the reliability of their systems. The Summit Z516 can emulate PCI Express 5.0 and CXL root complexes or device endpoints, allowing new designs to be tested against corner case issues.
Summit T54 Analyzer  The Summit T54 Protocol Analyzer captures, decodes and displays PCIe 5.0 protocol traffic data rates for x1, x2, x4 lane widths.
Summit M5x Protocol Analyzer /Jammer  The Summit M5x is Teledyne LeCroy's PCIe/ NVMe Jammer solution and is the latest protocol analyzer targeted at high speed PCI Express 5.0 I/O-based applications such as workstation, desktop, graphics, storage, and network card applications.
Summit Z58 Protocol Exerciser/Analyzer  The Summit Z58 is a PCIe 5.0 protocol traffic generation test tool used for critical test and verification intended to assist engineers in developing and improving the reliability of their systems. The Summit Z58 can emulate PCI Express 5.0 root complexes or device endpoints, allowing new designs to be tested against corner case issues.
Summit T416 Analyzer  The Summit T416 Protocol Analyzer captures, decodes and displays PCIe 4.0 protocol traffic data rates for x1, x2, x4, x8, x16 lane widths
Summit Z416 Protocol Exerciser  The Summit Z416 is a PCIe 4.0 protocol traffic generation test tool used for critical test and verification intended to assist engineers in developing and improving the reliability of their systems. The Summit Z416 can emulate PCI Express 4.0 root complexes or device endpoints, allowing new designs to be tested against corner case issues.
Summit T48 Analyzer  The Summit T48 Protocol Analyzer captures, decodes and displays PCIe 4.0 protocol traffic data rates for x1, x2, x4, x8, lane widths
Summit T3-16 Analyzer  The Summit T3-16 Protocol Analyzer captures, decodes and displays PCIe 3.0 protocol traffic data rates for x1, x2, x4, x8, x16 lane widths
Summit Z3-16 Exerciser with SMBus Support  The Summit Z3-16 with SMBus Support is a critical test and verification tool intended to assist engineers in developing and improving the reliability of their systems. The exerciser can emulate PCI Express root complexes or device endpoints, allowing new designs to be tested against corner case issues.In addition, it can emulate SMBus traffic as a master or slave.
Summit T3-8 Analyzer  The Summit T3-8 Protocol Analyzer captures, decodes and displays PCIe 3.0 protocol traffic data rates for x1, x2, x4, x8 lane widths
Summit T34 Analyzer  The Summit T34 Protocol Analyzer captures, decodes and displays PCIe 3.0 protocol traffic data rates for x1, x2, x4 lane widths
Summit T28 Analyzer  The Summit T28 Protocol Analyzer captures, decodes and displays PCIe 2.5GT/s and 5GT/s data rates for x1, x2, x4, x8 lane widths
Summit T24 Analyzer  The Teledyne LeCroy Summit T24 PCI Express analyzer is for customers developing PCIe 1.0 or 2.0 x4 lane width server, workstation, desktop, graphics, storage, and network card applications.
PCIe Compliance Testing  

The UNH NVMe conformance tests run on the Teledyne LeCroy Protocol analyzer and exerciser. These tools support the necessary NVMe emulation capabilities to perform these tests.

PXP-100B Test Platform  The Teledyne LeCroy PXP-100B Test Platform provides a convenient means for testing PCIe cards with a self-contained portable and powered passive backplane. The PXP-100B provides power required for both cards under test, and an interposer can be used for connection to a protocol analyzer.

Teledyne LeCroy is the main supplier of protocol analyzers and exercisers to companies developing SSD and other similar storage products using the new NVMe, SATA Express and SCSI Express high-speed serial data standards. Protocol analyzers and exercisers are used by developers and validation engineers to directly record and examine data traffic on serial data communication links between devices and systems. This equipment enables developers to reduce debug and test schedules, lower engineering development costs on new products and meet aggressive time-to-market requirements.

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NVMe Protocol Analysis Features for Storage Development and Test36:27

As storage developers make the transition from legacy SAS and SATA protocol-based SSDs to the more advanced NVMe and SATA Express technologies, they are encountering limitations in available design and test tools including limited trace recording times and a lack of standardized analysis reports for PCIe-based storage. These two issues are significant for the newer technologies of NVMe and SATA Express due to the following:

  • High performance SSD testing can require recording data traffic beyond a few minutes. This is not possible for many protocol analyzers due to limitations in their recording architectures.
  • While some test tool suppliers have claimed support for the NVMe and SATA Express protocols, support for these protocols has remained minimal. This has hampered developer's productivity due to the use of reporting systems designed for the older technologies, which are not optimized for quality testing on NVMe and SATA Express products.

The Summit T34 protocol analyzer, specifically targeted at PCIe storage applications, now supports long trace recordings with a new NVMe Enhanced Mode. The Summit T34 can also be configured with up to 64 GB of trace recording memory. NVMe Enhanced Mode builds on and optimizes the existing deep buffer memory to allow users long recording time capability. Depending on the speed of the DUT (Device Under Test), the recording time can be maximized to up to several hours for a single trace capture. This feature is useful for tasks such as measuring performance or determining how well your Queue handling algorithms are functioning. An example of the metrics that are now available include the ability to measure the NVMe queue distribution over a sustained period of time. The ability to gather queue behavior for long periods helps driver and OS developers fine tune their applications and balance queue loads for optimized product performance.

With over a decade of experience in providing PCI Express, SAS/SATA and other serial data protocols with standardized error analysis and product performance reports, Teledyne LeCroy has now created an NVMe and SATA Express SSD Performance and Analysis capability. Trace Expert™, a new feature in the PCIe Protocol Suite, creates a detailed report that the SSD industry requires to obtain a common understanding of how their SSD or storage systems are operating and includes information on the necessary PCIe based components. Information such as NVMe queues, commands, doorbell and control registers and many other metrics are captured, analyzed and organized into a detailed report providing developers a comprehensive status document for their products including a wide range of performance statistics.

In addition to the standard storage protocols, all of our NVMe platforms also fully support, Trusted Computer Group (TCG), Single Root I/O Virtualization (SRIOV), Multi-Root I/O Virtualization (MRIOV) and Address Translation Services (ATS). A full list of capabilities, views and reports can be found on the product pages (listed below) for each of our analyzers.

NVMe over PCIe Specification Decoding and Analysis - NVMe Initialization Decoding
• Decode NVMe Commands
• Analyze NVMe Queues
• NVMe Multiple Pointer Based Transactions
• NVMe Power Management
• Extract the PCIe SSD Base Address automatically
PCIe NVMe CXL

Teledyne LeCroy’s Summit™ T54 joins the Summit™ Family as the high performance protocol analyzer at PCIe 5.0 architecture. The new Summit™ T54 protocol analyzer based on the PCIe 5.0 specification supports up to 32GT/s and up to x4 lane width for protocol analysis. Companies that are interested in testing PCIe 5.0 based I/O cards such as Storage Controllers, Ethernet, Fibre Channel, Infiniband, and others will now be able to get all of the protocol analyzer debugging features they need, while being able to better manage their costs. SSD storage applications will also benefit from the integrated support for SSD bus protocols such as PCIe/ NVMe/ SMBus/ NVMe-MI/ TCG and others. When combined with Teledyne LeCroy’s Summit™ Z58 or Z516 protocol exerciser, the Summit™ T54 will provide a deeper understanding of test results on a variety of test configurations. Teledyne LeCroy’s wide range of high speed interposers and probes provide full flexibility and connectivity to CEM and other form factor sockets on system boards as well as solder down and mid-bus probes.

PCIe 5.0 Technology

PCIe 5.0 technology achieves twice the effective data throughput rate of the PCIe 4.0 standard through a combination of increased data bit rate (16 GT/s moving to 32 GT/s), PCIe 5.0 uses the same encoding as PCIe 4.0 that has proven reliable for data transmission.

PCIe 5.0 Speeds

With advanced features such as support for PCI Express Spec 5.0, data rates of 2.5, 5, 8, 16, 32 GT/s, lane widths from x1 to x4, and a full 64 GB of trace memory, the Summit T54 Protocol Analyzer provides unmatched capability and flexibility for developers and users of advanced PCI Express products. The Summit T54 is by far the most advanced and sophisticated PCI Express Analyzer available in the market today.

Powerful Views

As with other Teledyne LeCroy PCI Express analyzers, the Summit T54 leverages the intuitive and powerful CATC Trace analysis software system, embedding a deep understanding of the PCI Express protocol hierarchy and intricacies. The colorful, intuitive and easy to use graphical display allows you to quickly capture and validate PCI Express product designs. All Teledyne LeCroy PCI Express protocol analyzers employ high-impedance, non-intrusive probing technology, thereby allowing fully unaltered data pass-through.

Lane Swizzling

In addition to a full suite of advanced hardware and software features, the Summit T54 provides user-convenience and analysis features, such as support for "lane swizzling" which allows a board developer to lay out a Mid-Bus probe pad with lanes in non-standard order, simplifying the design of the board. Internally the Summit T54 maps the lanes back into their correct order and accurately displays the embedded bus traffic. Other software features include enhanced error checking for automatic identification of additional error types, more compact trace files that allow for faster analysis of trace data, and the choice of simplified or advanced modes for setting up trace recording options.

Bit Tracer

The raw recording mode, Bit Tracer, allows bytes to be recorded as they come across the link, allowing debugging of PHY layer problems and combining the features of a logic analyzer format with a protocol analyzer format. The new auto sense link feature monitors negotiation between devices of different lane widths, and the bifurcated link support recombines multilink PCI Express operations that have been separated into narrower links.

Lan Support

The Summit T54 also supports Ethernet LAN port as a standard feature. By connecting over a LAN, engineers can operate the system remotely (e.g., install the client software on their desktop systems, and control an analyzer operating in a remote lab). Also, multiple engineers working collaboratively can time-share use of a single analyzer, reducing the need for an additional analyzer for each engineer, and increasing the cost effectiveness of the product.

Debug in any PCIe environment

By leveraging years of experience in protocol analysis tools for emerging markets, Teledyne LeCroy's PCI Express protocol analyzers blend sophisticated functionality with practical features to speed the development of PCI Express IP cores, semiconductors, storage, graphics, servers, workstations, bridges, and switches.